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authorHou Zhiqiang <[email protected]>2019-07-05 17:56:34 +0800
committerLorenzo Pieralisi <[email protected]>2019-07-08 11:23:13 +0100
commitf7fee1b42fe4f8171a4b1cad05c61907c33c53f6 (patch)
tree8e649c8ab418c15e5b6cc0db5e9b26a8f052ffe3 /net/lapb/lapb_timer.c
parentf39ed3d09b34f733bb12178712019050bd8bd38d (diff)
PCI: mobiveil: Use the 1st inbound window for MEM inbound transactions
The inbound and outbound windows have completely separate control registers sets in the host controller MMIO space. Windows control register are accessed through an MMIO base address and an offset that depends on the window index. Since inbound and outbound windows control registers are completely separate there is no real need to use different window indexes in the inbound/outbound windows initialization routines to prevent clashing. To fix this inconsistency, change the MEM inbound window index to 0, mirroring the outbound window set-up. Signed-off-by: Hou Zhiqiang <[email protected]> [[email protected]: update commit log] Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Minghuan Lian <[email protected]> Reviewed-by: Subrahmanya Lingappa <[email protected]>
Diffstat (limited to 'net/lapb/lapb_timer.c')
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