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authorPaul Mackerras <[email protected]>2009-06-17 21:53:10 +1000
committerIngo Molnar <[email protected]>2009-06-18 11:11:46 +0200
commit98fb1807b97e3e631b940f67544e265c64b984dc (patch)
treef420b490e785b7d599a301cfcaa15475f7b6df41 /net/lapb/lapb_timer.c
parent079b3c569c87819e7a19d9b9f51d4746fc47bf9a (diff)
perf_counter: powerpc: Make powerpc perf_counter code safe for 32-bit kernels
This abstracts a few things in arch/powerpc/kernel/perf_counter.c that are specific to 64-bit kernels, and provides definitions for 32-bit kernels. In particular, * Only 64-bit has MMCRA and the bits in it that give information about a PMU interrupt (sampled PR, HV, slot number etc.) * Only 64-bit has the lppaca and the lppaca->pmcregs_in_use field * Use of SDAR is confined to 64-bit for now * Only 64-bit has soft/lazy interrupt disable and therefore pseudo-NMIs (interrupts that occur while interrupts are soft-disabled) * Only 64-bit has PMC7 and PMC8 * Only 64-bit has the MSR_HV bit. This also fixes the types used in a couple of places, where we were using long types for things that need to be 64-bit. Signed-off-by: Paul Mackerras <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: [email protected] Cc: [email protected] LKML-Reference: <[email protected]> Signed-off-by: Ingo Molnar <[email protected]>
Diffstat (limited to 'net/lapb/lapb_timer.c')
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