diff options
| author | Qingtao Cao <[email protected]> | 2022-09-02 16:14:34 +1000 |
|---|---|---|
| committer | Bartosz Golaszewski <[email protected]> | 2022-09-04 22:25:10 +0200 |
| commit | 5134272f9f3f71d4e1f3aa15cb09321af49b3646 (patch) | |
| tree | fed7562d45a8614dfe4908aa777752aa84bb398f /net/lapb/lapb_timer.c | |
| parent | 0eadd36d9123745f70e233a9d93951d05ca1916a (diff) | |
gpio: exar: access MPIO registers on cascaded chips
When EXAR xr17v35x chips are cascaded in order to access the MPIO registers
(part of the Device Configuration Registers) of the secondary chips, an offset
needs to be applied based on the number of primary chip's UART channels.
Signed-off-by: Qingtao Cao <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]>
Signed-off-by: Bartosz Golaszewski <[email protected]>
Diffstat (limited to 'net/lapb/lapb_timer.c')
0 files changed, 0 insertions, 0 deletions