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author | Saheed O. Bolarinwa <[email protected]> | 2021-11-19 20:37:30 +0100 |
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committer | Bjorn Helgaas <[email protected]> | 2021-11-19 16:46:09 -0600 |
commit | 222578dad4731cb8932471f42a0a606116ec5398 (patch) | |
tree | cbe66da90fef8dbe77435dbfe4b6b7ab4c2f4298 /net/lapb/lapb_timer.c | |
parent | 43262f001b318a0c0531e252b47bc6b07794f356 (diff) |
PCI/ASPM: Stop caching link L0s, L1 exit latencies
Previously we calculated the upstream and downstream L0s and L1 exit
latencies of the link in pcie_aspm_cap_init() and cached them in struct
pcie_link_state.latency_*.
These values are only used in pcie_aspm_check_latency() where they are
compared with the acceptable latencies on the link. This path is used when
removing or changing the D state of the device, so it's relatively low
frequency.
To reduce the amount of per-link data we store, remove the latency_*
entries from struct pcie_link_state and calculate the latencies directly
where they are needed.
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Saheed O. Bolarinwa <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Diffstat (limited to 'net/lapb/lapb_timer.c')
0 files changed, 0 insertions, 0 deletions