diff options
| author | Biju Das <[email protected]> | 2022-08-02 11:15:33 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2022-08-22 09:46:03 +0200 |
| commit | 13dec051c7f139eef345c55a60941843e72128f1 (patch) | |
| tree | f4267da3670896be04be8c0546f86757a10c6c8f /net/lapb/lapb_timer.c | |
| parent | f3b7bc89c97b98aa6f157d5f296695af8940a5ac (diff) | |
arm64: dts: renesas: r9a07g054: Fix SCI{Rx,Tx} interrupt types
As per the RZ/V2L Hardware User's Manual (Rev.1.00 Nov, 2021),
the interrupt type of SCI{Rx,Tx} is edge triggered.
Signed-off-by: Biju Das <[email protected]>
Fixes: 7c2b8198f4f321df ("arm64: dts: renesas: Add initial DTSI for RZ/V2L SoC")
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>
Diffstat (limited to 'net/lapb/lapb_timer.c')
0 files changed, 0 insertions, 0 deletions