PCI: designware: Parse bus-range property from devicetree

This allows to explicitly specify the covered bus numbers in the
devicetree, which will come in handy once we see a SoC with more than one
PCIe host controller instance.

Previously the driver relied on the behavior of pci_scan_root_bus() to fill
in a range of 0x00-0xff if no valid range was found.  We fall back to the
same range if no valid DT entry was found to keep backwards compatibility,
but now do it explicitly.

[bhelgaas: use %pR in error message to avoid duplication]
Signed-off-by: Lucas Stach <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Reviewed-by: Pratyush Anand <[email protected]>
Acked-by: Mohit Kumar <[email protected]>

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