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authorVidya Sagar <[email protected]>2019-06-12 15:23:35 +0530
committerThierry Reding <[email protected]>2019-06-21 16:04:53 +0200
commit2602c32f15e71729f3d638da5ad1692099cacf97 (patch)
tree1775d721d4564f8d09a4d61cb2dede36de434fde /net/lapb/lapb_subr.c
parent871be845dfee0a29572ae360c48f8fe20a81a126 (diff)
arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT
Add P2U (PIPE to UPHY) and PCIe controller nodes to device tree. The Tegra194 SoC contains six PCIe controllers and twenty P2U instances grouped into two different PHY bricks namely High-Speed IO (HSIO-12 P2Us) and NVIDIA High Speed (NVHS-8 P2Us) respectively. Signed-off-by: Vidya Sagar <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
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