spi: s3c64xx: add spi port configuration for Exynos Auto v9 SoC

Add exynosautov9 spi port configuration. It supports up to 12 spis so
MAX_SPI_PORTS should be increased from 6 to 12.
It has DIV_4 as the default internal clock divider and an internal
loopback mode to run a loopback test.

Reviewed-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Andi Shyti <[email protected]>
Signed-off-by: Chanho Park <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>

0 files changed, 0 insertions, 0 deletions