diff options
author | Peter Zijlstra <[email protected]> | 2022-03-08 16:30:35 +0100 |
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committer | Peter Zijlstra <[email protected]> | 2022-03-15 10:32:39 +0100 |
commit | 991625f3dd2cbc4b787deb0213e2bcf8fa264b21 (patch) | |
tree | f328f63188d911d258d895b0f0a1a7d98ba16429 /net/lapb/lapb_in.c | |
parent | 0aec21cfb51bc1856206f312d8c13bf1f368d78e (diff) |
x86/ibt: Add IBT feature, MSR and #CP handling
The bits required to make the hardware go.. Of note is that, provided
the syscall entry points are covered with ENDBR, #CP doesn't need to
be an IST because we'll never hit the syscall gap.
Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
Acked-by: Josh Poimboeuf <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'net/lapb/lapb_in.c')
0 files changed, 0 insertions, 0 deletions