diff options
author | Vivek Gautam <[email protected]> | 2014-11-21 19:05:46 +0530 |
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committer | Felipe Balbi <[email protected]> | 2014-11-21 09:06:43 -0600 |
commit | 72d996fc7a01c2e4d581a15db7d001e2799ffb29 (patch) | |
tree | befa43b8232d147fba1703864ce2842ad729695e /net/lapb/lapb_in.c | |
parent | c1a3acaadde7eb260f4fd4ec87cb87d3ffeed979 (diff) |
usb: dwc3: exynos: Add provision for suspend clock
DWC3 controller on Exynos SoC series have separate control for
suspend clock which replaces pipe3_rx_pclk as clock source to
a small part of DWC3 core that operates when SS PHY is in its
lowest power state (P3) in states SS.disabled and U3.
Suggested-by: Anton Tikhomirov <[email protected]>
Signed-off-by: Vivek Gautam <[email protected]>
Signed-off-by: Felipe Balbi <[email protected]>
Diffstat (limited to 'net/lapb/lapb_in.c')
0 files changed, 0 insertions, 0 deletions