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authorRajat Jain <[email protected]>2017-01-02 22:34:13 -0800
committerBjorn Helgaas <[email protected]>2017-02-14 17:44:25 -0600
commitf1f0366dd6be9624f7d355b72cc909ab821eb4c0 (patch)
tree272dd86f5011286fc17097b6279f6c4918f4d7c9 /net/lapb/lapb_iface.c
parentb5a0a9b59c8185aebcd9a717e2e6258b58c72c06 (diff)
PCI/ASPM: Calculate and save the L1.2 timing parameters
Calculate and save the timing parameters that need to be programmed if we need to enable L1.2 substates later. We use the same logic (and a constant value for 1 of the parameters) as used by Intel's coreboot: https://www.coreboot.org/pipermail/coreboot-gerrit/2015-March/021134.html https://review.coreboot.org/#/c/8832/ Signed-off-by: Rajat Jain <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
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