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authorLeonid Yegoshin <[email protected]>2013-09-11 14:17:47 -0500
committerRalf Baechle <[email protected]>2013-09-13 11:59:51 +0200
commit670bac3a8c201fc1f5f92ac6b4a8b42dc8172937 (patch)
tree45fd83bde9a24dd549ac05bc20b51bc1b21df769 /lib
parent5359b938c088423a28c41499f183cd10824c1816 (diff)
MIPS: Fix SMP core calculations when using MT support.
The TCBIND register is only available if the core has MT support. It should not be read otherwise. Secondly, the number of TCs (siblings) are calculated differently depending on if the kernel is configured as SMVP or SMTC. Signed-off-by: Leonid Yegoshin <[email protected]> Signed-off-by: Steven J. Hill <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/5822/ Signed-off-by: Ralf Baechle <[email protected]>
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