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author | Neil Armstrong <narmstrong@baylibre.com> | 2019-08-26 09:25:39 +0200 |
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committer | Kevin Hilman <khilman@baylibre.com> | 2019-08-29 16:18:38 -0700 |
commit | 488b0ffc0e8b29367c949e6ddd8febf0ff220837 (patch) | |
tree | a5ea96433030a5c1fdb103c97274988dad1a9009 /lib | |
parent | 700ab8d839271edf4eb8de848f116f55d97a60fa (diff) |
arm64: dts: meson-sm1-sei610: enable DVFS
This enables DVFS for the Amlogic SM1 based SEI610 board by:
- Adding the SM1 SoC OPPs taken from the vendor tree
- Selecting the SM1 Clock controller instead of the G12A one
- Adding the CPU rail regulator, PWM and OPPs for each CPU nodes.
Each power supply can achieve 0.69V to 1.05V using a single PWM
output clocked at 666KHz with an inverse duty-cycle.
DVFS has been tested by running the arm64 cpuburn at [1] and cycling
between all the possible cpufreq translations of the cpu cluster and
checking the final frequency using the clock-measurer, script at [2].
[1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S
[2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'lib')
0 files changed, 0 insertions, 0 deletions