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authorChris Wilson <[email protected]>2011-03-07 10:42:03 +0000
committerChris Wilson <[email protected]>2011-03-07 11:02:16 +0000
commit467cffba85791cdfce38c124d75bd578f4bb8625 (patch)
tree0691f4483f1ca2a2b090554682b060c208ea6886 /lib
parenta1656b9090f7008d2941c314f5a64724bea2ae37 (diff)
drm/i915: Rebind the buffer if its alignment constraints changes with tiling
Early gen3 and gen2 chipset do not have the relaxed per-surface tiling constraints of the later chipsets, so we need to check that the GTT alignment is correct for the new tiling. If it is not, we need to rebind. Reported-by: Daniel Vetter <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Chris Wilson <[email protected]>
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