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authorDave Jiang <dave.jiang@intel.com>2023-12-21 15:03:51 -0700
committerDan Williams <dan.j.williams@intel.com>2023-12-22 15:31:52 -0800
commit1037b82fccfe9c001ffa7a883651bb4cde7b705c (patch)
tree173991d20c2d725fb0b002a6ea8b3790bdc30ed7 /lib
parentf2202f990456acc52b50f6b14c95b232ac14429b (diff)
cxl: Store the access coordinates for the generic ports
Each CXL host bridge is represented by an ACPI0016 device. A generic port device handle that is an ACPI device is represented by a string of ACPI0016 device HID and UID. Create a device handle from the ACPI device and retrieve the access coordinates from the stored memory targets. The access coordinates are stored under the cxl_dport that is associated with the CXL host bridge. The access coordinates struct is dynamically allocated under cxl_dport in order for code later on to detect whether the data exists or not. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/170319623196.2212653.17916695743464172534.stgit@djiang5-mobl3 Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'lib')
0 files changed, 0 insertions, 0 deletions