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| author | Neil Armstrong <[email protected]> | 2023-09-05 15:19:25 +0200 |
|---|---|---|
| committer | Marc Zyngier <[email protected]> | 2023-09-12 13:38:08 +0100 |
| commit | 5873d380f4c0ff23ec7d0d1780107e46a4637c0e (patch) | |
| tree | 70a1aadb20c2585746f70e5f6668cfd2a1cf4259 /lib/zstd/common/zstd_common.c | |
| parent | 0bb80ecc33a8fb5a682236443c1e740d5c917d1d (diff) | |
irqchip/qcom-pdc: Add support for v3.2 HW
Starting from HW version 3.2 the IRQ_ENABLE bit has moved to the
IRQ_i_CFG register and requires a change of the driver to avoid
writing into an undefined register address.
Get the HW version from registers and set the IRQ_ENABLE bit to the
correct register depending on the HW version.
Signed-off-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Maulik Shah <[email protected]>
Signed-off-by: Neil Armstrong <[email protected]>
Acked-by: Konrad Dybcio <[email protected]>
Signed-off-by: Marc Zyngier <[email protected]>
Link: https://lore.kernel.org/r/20230905-topic-sm8x50-upstream-pdc-ver-v4-1-fc633c7df84b@linaro.org
Diffstat (limited to 'lib/zstd/common/zstd_common.c')
0 files changed, 0 insertions, 0 deletions