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| author | Chen-Yu Tsai <wenst@chromium.org> | 2021-08-12 01:15:05 +0800 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2021-08-20 15:03:01 +0100 |
| commit | 8d474deaba2c4dd33a5e2f5be82e6798ffa6b8a5 (patch) | |
| tree | 6f1140710fa4c40fbd0209b301d7505ac1f0712e /lib/zstd/common/debug.c | |
| parent | 60a1cd10b222e004f860d14651e80089c77e8e6b (diff) | |
irqchip/gic-v3: Fix priority comparison when non-secure priorities are used
When non-secure priorities are used, compared to the raw priority set,
the value read back from RPR is also right-shifted by one and the
highest bit set.
Add a macro to do the modifications to the raw priority when doing the
comparison against the RPR value. This corrects the pseudo-NMI behavior
when non-secure priorities in the GIC are used. Tested on 5.10 with
the "IPI as pseudo-NMI" series [1] applied on MT8195.
[1] https://lore.kernel.org/linux-arm-kernel/1604317487-14543-1-git-send-email-sumit.garg@linaro.org/
Fixes: 336780590990 ("irqchip/gic-v3: Support pseudo-NMIs when SCR_EL3.FIQ == 0")
Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
[maz: Added comment contributed by Alex]
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210811171505.1502090-1-wenst@chromium.org
Diffstat (limited to 'lib/zstd/common/debug.c')
0 files changed, 0 insertions, 0 deletions