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authorPaul Mackerras <[email protected]>2016-03-05 19:34:39 +1100
committerPaul Mackerras <[email protected]>2016-03-08 13:36:42 +1100
commitccec44563b18a0ce90e2d4f332784b3cb25c8e9c (patch)
tree00879794b39f4561398926e0cbc6ba9588827bc3 /lib/timerqueue.c
parent2680d6da455b636dd006636780c0f235c6561d70 (diff)
KVM: PPC: Book3S HV: Sanitize special-purpose register values on guest exit
Thomas Huth discovered that a guest could cause a hard hang of a host CPU by setting the Instruction Authority Mask Register (IAMR) to a suitable value. It turns out that this is because when the code was added to context-switch the new special-purpose registers (SPRs) that were added in POWER8, we forgot to add code to ensure that they were restored to a sane value on guest exit. This adds code to set those registers where a bad value could compromise the execution of the host kernel to a suitable neutral value on guest exit. Cc: [email protected] # v3.14+ Fixes: b005255e12a3 Reported-by: Thomas Huth <[email protected]> Reviewed-by: David Gibson <[email protected]> Signed-off-by: Paul Mackerras <[email protected]>
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