diff options
| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2015-10-08 18:56:26 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2015-11-07 10:37:30 +0100 |
| commit | 354dbaa7ff5b53a0ed1c0f7a9773d5953b3a1bb9 (patch) | |
| tree | 090e7de8dfc9c94f35ecf0267747b72ab5c71756 /lib/timerqueue.c | |
| parent | 66ef3493d4bb387f5a83915e33dc893102fd1b43 (diff) | |
x86/cpu/intel: Enable X86_FEATURE_NONSTOP_TSC_S3 for Merrifield
The Intel Merrifield SoC is a successor of the Intel MID line of
SoCs. Let's set the neccessary capability for that chip. See commit
c54fdbb2823d (x86: Add cpu capability flag X86_FEATURE_NONSTOP_TSC_S3)
for the details.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: http://lkml.kernel.org/r/1444319786-36125-1-git-send-email-andriy.shevchenko@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'lib/timerqueue.c')
0 files changed, 0 insertions, 0 deletions