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authorThinh Nguyen <[email protected]>2018-03-16 15:33:48 -0700
committerFelipe Balbi <[email protected]>2018-03-22 10:48:46 +0200
commitfab3833338779e1e668bd58d1f76d601657304b8 (patch)
treea7071ba2b0f8b27bfadc3600040378fdf2b5bd65 /lib/test_overflow.c
parentcabdf83dadfb3d83eec31e0f0638a92dbd716435 (diff)
usb: dwc3: Add SoftReset PHY synchonization delay
From DWC_usb31 programming guide section 1.3.2, once DWC3_DCTL_CSFTRST bit is cleared, we must wait at least 50ms before accessing the PHY domain (synchronization delay). Signed-off-by: Thinh Nguyen <[email protected]> Signed-off-by: Felipe Balbi <[email protected]>
Diffstat (limited to 'lib/test_overflow.c')
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