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author | Nicolas Saenz Julienne <[email protected]> | 2020-07-30 20:26:19 +0200 |
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committer | Stephen Boyd <[email protected]> | 2020-08-03 14:26:20 -0700 |
commit | f34e4651ce66a754f41203284acf09b28b9dd955 (patch) | |
tree | 441b9e580c048be5e31c40a5ed365a029916effe /lib/test_overflow.c | |
parent | 2a08a9232ba2e6103843870e68edae8e381eb02a (diff) |
clk: bcm2835: Do not use prediv with bcm2711's PLLs
Contrary to previous SoCs, bcm2711 doesn't have a prescaler in the PLL
feedback loop. Bypass it by zeroing fb_prediv_mask when running on
bcm2711.
Note that, since the prediv configuration bits were re-purposed, this
was triggering miscalculations on all clocks hanging from the VPU clock,
notably the aux UART, making its output unintelligible.
Fixes: 42de9ad400af ("clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support")
Reported-by: Nathan Chancellor <[email protected]>
Signed-off-by: Nicolas Saenz Julienne <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Tested-by: Nathan Chancellor <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'lib/test_overflow.c')
0 files changed, 0 insertions, 0 deletions