aboutsummaryrefslogtreecommitdiff
path: root/lib/test_overflow.c
diff options
context:
space:
mode:
authorAdam Ford <[email protected]>2020-06-03 10:43:29 -0500
committerStephen Boyd <[email protected]>2020-06-22 19:04:58 -0700
commit260249f929e81d3d5764117fdd6b9e43eb8fb1d5 (patch)
treee53b6f726cd07e8dc0d2ccdf868deb6f8c9613d2 /lib/test_overflow.c
parent34662f6e30846ae0f82bbc9605deff67781f6616 (diff)
clk: vc5: Enable addition output configurations of the Versaclock
The existing driver is expecting the Versaclock to be pre-programmed, and only sets the output frequency. Unfortunately, not all devices are pre-programmed, and the Versaclock chip has more options beyond just the frequency. This patch enables the following additional features: - Programmable voltage: 1.8V, 2.5V, or 3.3V​ - Slew Percentage of normal: 85%, 90%, or 100% - Output Type: LVPECL, CMOS, HCSL, or LVDS Signed-off-by: Adam Ford <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'lib/test_overflow.c')
0 files changed, 0 insertions, 0 deletions