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author | Prathamesh Shete <pshete@nvidia.com> | 2024-04-24 15:25:14 +0530 |
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committer | Bartosz Golaszewski <bartosz.golaszewski@linaro.org> | 2024-04-24 15:31:41 +0200 |
commit | d806f474a9a7993648a2c70642ee129316d8deff (patch) | |
tree | 59431ce976376b527097b8f6e36af5aa0d3355c7 /lib/test_min_heap.c | |
parent | ed30a4a51bb196781c8058073ea720133a65596f (diff) |
gpio: tegra186: Fix tegra186_gpio_is_accessible() check
The controller has several register bits describing access control
information for a given GPIO pin. When SCR_SEC_[R|W]EN is unset, it
means we have full read/write access to all the registers for given GPIO
pin. When SCR_SEC[R|W]EN is set, it means we need to further check the
accompanying SCR_SEC_G1[R|W] bit to determine read/write access to all
the registers for given GPIO pin.
This check was previously declaring that a GPIO pin was accessible
only if either of the following conditions were met:
- SCR_SEC_REN + SCR_SEC_WEN both set
or
- SCR_SEC_REN + SCR_SEC_WEN both set and
SCR_SEC_G1R + SCR_SEC_G1W both set
Update the check to properly handle cases where only one of
SCR_SEC_REN or SCR_SEC_WEN is set.
Fixes: b2b56a163230 ("gpio: tegra186: Check GPIO pin permission before access.")
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20240424095514.24397-1-pshete@nvidia.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Diffstat (limited to 'lib/test_min_heap.c')
0 files changed, 0 insertions, 0 deletions