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author | Palmer Dabbelt <palmerdabbelt@google.com> | 2021-10-21 08:22:37 -0700 |
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committer | Palmer Dabbelt <palmerdabbelt@google.com> | 2021-10-21 08:22:37 -0700 |
commit | 241527bb84674bd597113892ecf2c7ed4a410e00 (patch) | |
tree | 9154f870ac860e376f8bde6fd4c85c4dda9030a9 /lib/test_fortify/write_overflow-strncpy.c | |
parent | 9406369ae6278532cb8d9d3cf3a8f1354662fb80 (diff) | |
parent | 9962a066f3c1d4588d0dd876ceac2c03ef87acf3 (diff) |
Merge tag 'riscv-sifive-dt-5.16' of git://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux into for-next
RISC-V DTS changes for v5.16
Cleanups of RISC-V SiFive and Microchip DTSes with dtschema. These are
few minor fixes to make DTSes pass the dtschema, without actual
functional effect.
* tag 'riscv-sifive-dt-5.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
riscv: dts: sifive: add missing compatible for plic
riscv: dts: microchip: add missing compatibles for clint and plic
riscv: dts: sifive: drop duplicated nodes and properties in sifive
riscv: dts: sifive: fix Unleashed board compatible
riscv: dts: sifive: use only generic JEDEC SPI NOR flash compatible
Diffstat (limited to 'lib/test_fortify/write_overflow-strncpy.c')
0 files changed, 0 insertions, 0 deletions