diff options
| author | Conor Dooley <[email protected]> | 2023-03-07 21:10:54 +0000 |
|---|---|---|
| committer | Conor Dooley <[email protected]> | 2023-03-15 14:43:48 +0000 |
| commit | e77da13b8e3626fc6d01287fba7c1eee4ebfe018 (patch) | |
| tree | 19b73a7bc0867e87629ccb3d90b7be7383b62cf3 /lib/test_fortify/write_overflow-strncpy-src.c | |
| parent | 0e9b70c1e3623fa110fb6be553e644524228ef60 (diff) | |
riscv: dts: microchip: fix the mpfs' mailbox regs
The mailbox on PolarFire SoC should really have three reg properties,
not two. Without splitting into three sections, the system controller's
QSPI cannot be accessed as it sits inside the current first range. The
driver & binding have been adapted to account for both two & three
ranges, so fix the dts too.
Acked-by: Palmer Dabbelt <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
Diffstat (limited to 'lib/test_fortify/write_overflow-strncpy-src.c')
0 files changed, 0 insertions, 0 deletions