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| author | Rajendra Nayak <[email protected]> | 2022-09-20 16:45:15 +0530 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2022-09-27 21:58:38 -0500 |
| commit | d399723950c45cd9507aef848771826afc3f69b0 (patch) | |
| tree | a96da373239c0e427cf2aa03fabc8ab9c007f318 /lib/test_fortify/write_overflow-strncpy-src.c | |
| parent | e55d937d8cf391c1fb9afad296948b3697ad96f7 (diff) | |
clk: qcom: gdsc: Fix the handling of PWRSTS_RET support
GDSCs cannot be transitioned into a Retention state in SW.
When either the RETAIN_MEM bit, or both the RETAIN_MEM and
RETAIN_PERIPH bits are set, and the GDSC is left ON, the HW
takes care of retaining the memory/logic for the domain when
the parent domain transitions to power collapse/power off state.
On some platforms where the parent domains lowest power state
itself is Retention, just leaving the GDSC in ON (without any
RETAIN_MEM/RETAIN_PERIPH bits being set) will also transition
it to Retention.
The existing logic handling the PWRSTS_RET seems to set the
RETAIN_MEM/RETAIN_PERIPH bits if the cxcs offsets are specified
but then explicitly turns the GDSC OFF as part of _gdsc_disable().
Fix that by leaving the GDSC in ON state.
Signed-off-by: Rajendra Nayak <[email protected]>
Cc: AngeloGioacchino Del Regno <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'lib/test_fortify/write_overflow-strncpy-src.c')
0 files changed, 0 insertions, 0 deletions