diff options
| author | Kuninori Morimoto <[email protected]> | 2023-08-22 23:50:31 +0000 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2023-08-23 13:53:25 +0100 |
| commit | bd4cee2fdf69b56c2bf3e7ec7c2e12b81e08005c (patch) | |
| tree | f3a615081f7469358aacceded2239700efa01caf /lib/test_fortify/write_overflow-strncpy-src.c | |
| parent | 220adc0fda6bbc274fff5825e2fd7d3dcd719e5c (diff) | |
ASoC: rsnd: enable clk_i approximate rate usage
Basically Renesas sound ADG is assuming that it has accurately
divisible input clock. But sometimes / some board might not have it.
The clk_i from CPG is used for such case. It can't calculate accurate
division, but can be used as approximate rate.
This patch enable clk_i for such case.
Signed-off-by: Kuninori Morimoto <[email protected]>
Acked-by: Adnan Ali <[email protected]>
Tested-by: Vincenzo De Michele <[email protected]>
Tested-by: Patrick Keil <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'lib/test_fortify/write_overflow-strncpy-src.c')
0 files changed, 0 insertions, 0 deletions