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authorHan Xu <[email protected]>2022-09-15 10:09:59 -0500
committerStephen Boyd <[email protected]>2022-09-28 13:26:16 -0700
commitb1ff1bfe81e763420afd5f3f25f0b3cbfd97055c (patch)
tree9999af6824df99e161fecbfe035dd9f178053632 /lib/test_fortify/write_overflow-strncpy-src.c
parent3d87f6c3be0df4a0f6d0ca719550a7bc77e520bf (diff)
clk: imx: imx6sx: remove the SET_RATE_PARENT flag for QSPI clocks
There is no dedicate parent clock for QSPI so SET_RATE_PARENT flag should not be used. For instance, the default parent clock for QSPI is pll2_bus, which is also the parent clock for quite a few modules, such as MMDC, once GPMI NAND set clock rate for EDO5 mode can cause system hang due to pll2_bus rate changed. Fixes: f1541e15e38e ("clk: imx6sx: Switch to clk_hw based API") Signed-off-by: Han Xu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Tested-by: Fabio Estevam <[email protected]> Reviewed-by: Abel Vesa <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'lib/test_fortify/write_overflow-strncpy-src.c')
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