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| author | Siddharth Vadapalli <[email protected]> | 2023-03-15 11:53:04 +0530 |
|---|---|---|
| committer | Nishanth Menon <[email protected]> | 2023-03-20 12:46:23 -0500 |
| commit | a2ff7f1108f6eeaa73a60378ed891b634a3bba61 (patch) | |
| tree | 9e9bda821f037687079fdb472ebfdb7c7bd63de2 /lib/test_fortify/write_overflow-strncpy-src.c | |
| parent | 6cd4b7cfbcca4a45f06a8031f299c4019221a4ce (diff) | |
arm64: dts: ti: k3-j721e: Add CPSW9G nodes
TI's J721E SoC has a 9 port Ethernet Switch instance with 8 external
ports and 1 host port, referred to as CPSW9G.
Add device-tree nodes for CPSW9G and disable it by default. Device-tree
overlays will be used to enable it.
Signed-off-by: Siddharth Vadapalli <[email protected]>
Reviewed-by: Andrew Davis <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Nishanth Menon <[email protected]>
Diffstat (limited to 'lib/test_fortify/write_overflow-strncpy-src.c')
0 files changed, 0 insertions, 0 deletions