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author | Kanak Shilledar <[email protected]> | 2024-06-15 07:45:03 +0530 |
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committer | Palmer Dabbelt <[email protected]> | 2024-06-24 13:26:55 -0700 |
commit | 9ff141042a6204ca69c2adcd0e35705fa2554950 (patch) | |
tree | 4e93d9b13ce58c06d3b6fc1b0407e19ed9106dc4 /lib/test_fortify/write_overflow-strncpy-src.c | |
parent | 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0 (diff) |
dt-bindings: interrupt-controller: riscv,cpu-intc: convert to dtschema
Convert the RISC-V Hart-Level Interrupt Controller (HLIC) to newer
DT schema, Created DT schema based on the .txt file which had
`compatible`, `#interrupt-cells` and `interrupt-controller` as
required properties.
Changes made with respect to original file:
- Changed the example to just use interrupt-controller instead of
using the whole cpu block
- Changed the example compatible string.
Reviewed-by: Conor Dooley <[email protected]>
Signed-off-by: Kanak Shilledar <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Palmer Dabbelt <[email protected]>
Diffstat (limited to 'lib/test_fortify/write_overflow-strncpy-src.c')
0 files changed, 0 insertions, 0 deletions