diff options
| author | Abel Vesa <[email protected]> | 2024-05-27 10:20:36 +0300 |
|---|---|---|
| committer | Vinod Koul <[email protected]> | 2024-06-03 19:30:47 +0530 |
| commit | 99bf89626335bbec71d8461f0faec88551440850 (patch) | |
| tree | 6aaff1ae9fbc83650999d3febcd65959d2484fc1 /lib/test_fortify/write_overflow-strncpy-src.c | |
| parent | 5314e84c33e7ad61df5203df540626ac59f9dcd9 (diff) | |
phy: qcom-qmp: pcs: Add missing v6 N4 register offsets
The new X1E80100 SoC bumps up the HW version of QMP phy to v6 N4 for
combo USB and DP PHY. Currently, the X1E80100 uses the pure V6 PCS
register offsets, which are different. Add the offsets so the
mentioned platform can be fixed later on. Add the new PCS offsets
in a dedicated header file.
Fixes: d7b3579f84f7 ("phy: qcom-qmp-combo: Add x1e80100 USB/DP combo phys")
Co-developed-by: Kuogee Hsieh <[email protected]>
Signed-off-by: Kuogee Hsieh <[email protected]>
Signed-off-by: Abel Vesa <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/20240527-x1e80100-phy-qualcomm-combo-fix-dp-v1-2-be8a0b882117@linaro.org
Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'lib/test_fortify/write_overflow-strncpy-src.c')
0 files changed, 0 insertions, 0 deletions