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authorElaine Zhang <[email protected]>2022-09-07 21:31:56 +0530
committerHeiko Stuebner <[email protected]>2022-09-13 12:09:14 +0200
commit30d8b7d43c840f5907c0e688d41093f176ba8ac1 (patch)
tree820fd500c4add2d430e5d1b804aadde51f16f071 /lib/test_fortify/write_overflow-strncpy-src.c
parent1c23f9e627a7b412978b4e852793c5e3c3efc555 (diff)
clk: rockchip: Add MUXTBL variant
Add a clock branch consisting of a mux with non-standard select values. The parent in Mux table is sorted by priority. Use clk_register_mux_table() to register such a mux-clock. Cc: [email protected] Cc: Michael Turquette <[email protected]> Cc: Stephen Boyd <[email protected]> Signed-off-by: Elaine Zhang <[email protected]> Signed-off-by: Jagan Teki <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
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