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author | Andre Przywara <[email protected]> | 2023-03-20 00:52:47 +0000 |
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committer | Jernej Skrabec <[email protected]> | 2023-03-27 22:45:22 +0200 |
commit | 927e310e8e9d891b7621f77c369d234624d3a4fe (patch) | |
tree | bfdb7ad5b805bf33f4ced6d748471631126ae606 /lib/test_fortify/write_overflow-strlcpy.c | |
parent | a3eebcb61ffb9a26ca77a00ce80050cff0f0ecf3 (diff) |
ARM: dts: sunxi: add Allwinner T113-s SoC .dtsi
The Allwinner T113-s SoC is apparently using the same (or at least a very
similar) die as the D1/D1s, but replaces the single RISC-V core with
two Arm Cortex-A7 cores.
Since the D1 core .dtsi already describes all common peripherals, we
just need a DT describing the ARM specific peripherals: the CPU cores,
the Generic Timer, the GIC and the PMU.
We include the core .dtsi directly from the riscv DT directory.
Signed-off-by: Andre Przywara <[email protected]>
Acked-by: Jernej Skrabec <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Jernej Skrabec <[email protected]>
Diffstat (limited to 'lib/test_fortify/write_overflow-strlcpy.c')
0 files changed, 0 insertions, 0 deletions