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authorArtur Rojek <[email protected]>2023-05-27 18:44:50 +0200
committerJohn Paul Adrian Glaubitz <[email protected]>2023-07-05 18:55:25 +0200
commite82e47584847129a20b8c9f4a1dcde09374fb0e0 (patch)
tree94ad71d8fb0ea00b793e9d8b0f938ae597da5ded /lib/test_fortify/write_overflow-strlcpy-src.c
parent4bd04b2037423f11e6be03709d1fccdc6045c4a1 (diff)
sh: dma: Fix DMA channel offset calculation
Various SoCs of the SH3, SH4 and SH4A family, which use this driver, feature a differing number of DMA channels, which can be distributed between up to two DMAC modules. The existing implementation fails to correctly accommodate for all those variations, resulting in wrong channel offset calculations and leading to kernel panics. Rewrite dma_base_addr() in order to properly calculate channel offsets in a DMAC module. Fix dmaor_read_reg() and dmaor_write_reg(), so that the correct DMAC module base is selected for the DMAOR register. Fixes: 7f47c7189b3e8f19 ("sh: dma: More legacy cpu dma chainsawing.") Signed-off-by: Artur Rojek <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Reviewed-by: John Paul Adrian Glaubitz <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: John Paul Adrian Glaubitz <[email protected]>
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