diff options
| author | Conor Dooley <[email protected]> | 2022-04-13 08:58:31 +0100 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2022-04-22 18:40:11 -0700 |
| commit | 3ebb9fdf466a246bb17164b70039dce584a0b959 (patch) | |
| tree | ae147fc6ca7cfa2c222db4bc44d9a62ad6be805b /lib/test_fortify/write_overflow-strlcpy-src.c | |
| parent | 2b6190c804238cbdca4e4fbe20304151203a3837 (diff) | |
dt-bindings: clk: mpfs document msspll dri registers
As there are two sections of registers that are responsible for clock
configuration on the PolarFire SoC: add the dynamic reconfiguration
interface section to the binding & describe what each of the sections
are used for.
Fixes: 2145bb687e3f ("dt-bindings: clk: microchip: Add Microchip PolarFire host binding")
Reviewed-by: Daire McNamara <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Acked-by: Palmer Dabbelt <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'lib/test_fortify/write_overflow-strlcpy-src.c')
0 files changed, 0 insertions, 0 deletions