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author | Brent Lu <brent.lu@intel.com> | 2024-04-26 10:25:29 -0500 |
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committer | Mark Brown <broonie@kernel.org> | 2024-04-29 23:49:21 +0900 |
commit | 3d84e070253eb853e3190a23994aa3074615efd1 (patch) | |
tree | 05b318287f482a8ec488ccb7c9fa6f16c39342ea /lib/test_fortify/write_overflow-strlcpy-src.c | |
parent | 4524b1e3ef7884e0a54484dce8d921be7a06af13 (diff) |
ASoC: Intel: sof-rt5682: support bclk as PLL source on rt5682s
For rt5682s codec, we could use bclk as PLL source when the frequency
is 3.072MHz but no 2.4MHz. Update the code to select correct pll_id
and clk_id for 3.072MHz bclk.
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Signed-off-by: Brent Lu <brent.lu@intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20240426152529.38345-24-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'lib/test_fortify/write_overflow-strlcpy-src.c')
0 files changed, 0 insertions, 0 deletions