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| author | Marc Zyngier <[email protected]> | 2022-03-15 16:50:32 +0000 |
|---|---|---|
| committer | Marc Zyngier <[email protected]> | 2022-04-05 16:33:13 +0100 |
| commit | 0df6664531a12cdd8fc873f0cac0dcb40243d3e9 (patch) | |
| tree | 36147a2d0f98184419b7f3236090a33e387012f0 /lib/test_fortify/write_overflow-strlcpy-src.c | |
| parent | af27e41612ec7e5b4783f589b753a7c31a37aac8 (diff) | |
irqchip/gic-v3: Fix GICR_CTLR.RWP polling
It turns out that our polling of RWP is totally wrong when checking
for it in the redistributors, as we test the *distributor* bit index,
whereas it is a different bit number in the RDs... Oopsie boo.
This is embarassing. Not only because it is wrong, but also because
it took *8 years* to notice the blunder...
Just fix the damn thing.
Fixes: 021f653791ad ("irqchip: gic-v3: Initial support for GICv3")
Signed-off-by: Marc Zyngier <[email protected]>
Cc: [email protected]
Reviewed-by: Andre Przywara <[email protected]>
Reviewed-by: Lorenzo Pieralisi <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'lib/test_fortify/write_overflow-strlcpy-src.c')
0 files changed, 0 insertions, 0 deletions