diff options
| author | Marco Felsch <[email protected]> | 2023-08-07 10:47:43 +0200 |
|---|---|---|
| committer | Abel Vesa <[email protected]> | 2023-08-14 12:52:32 +0300 |
| commit | 37cfd5e457cbdcd030f378127ff2d62776f641e7 (patch) | |
| tree | 26b644d5a8c695213122efd2f751e61775532ea4 /lib/test_fortify/write_overflow-memcpy.c | |
| parent | 4dd432d985ef258e3bc436e568fba4b987b59171 (diff) | |
clk: imx: pll14xx: align pdiv with reference manual
The PLL14xx hardware can be found on i.MX8M{M,N,P} SoCs and always come
with a 6-bit pre-divider. Neither the reference manuals nor the
datasheets of these SoCs do mention any restrictions. Furthermore the
current code doesn't respect the restrictions from the comment too.
Therefore drop the restriction and align the max pre-divider (pdiv)
value to 63 to get more accurate frequencies.
Fixes: b09c68dc57c9 ("clk: imx: pll14xx: Support dynamic rates")
Cc: [email protected]
Signed-off-by: Marco Felsch <[email protected]>
Reviewed-by: Abel Vesa <[email protected]>
Reviewed-by: Adam Ford <[email protected]>
Signed-off-by: Philipp Zabel <[email protected]>
Acked-by: Sascha Hauer <[email protected]>
Tested-by: Ahmad Fatoum <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Abel Vesa <[email protected]>
Diffstat (limited to 'lib/test_fortify/write_overflow-memcpy.c')
0 files changed, 0 insertions, 0 deletions