diff options
| author | Phil Edworthy <[email protected]> | 2022-05-04 15:54:46 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2022-05-06 09:38:40 +0200 |
| commit | 23426d1be3c20907b4f3d72bf95234d4ee254393 (patch) | |
| tree | 2ec446e7cc89360c1d00315d51a112af86be1095 /lib/test_fortify/write_overflow-memcpy.c | |
| parent | 1dd65bb08604ad2906d839c243e1bede2b0efe53 (diff) | |
clk: renesas: r9a09g011: Add eth clock and reset entries
Add ethernet clock/reset entries to CPG driver.
Note that the AXI and CHI clocks are both enabled and disabled using
the same register bit.
Signed-off-by: Phil Edworthy <[email protected]>
Reviewed-by: Biju Das <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>
Diffstat (limited to 'lib/test_fortify/write_overflow-memcpy.c')
0 files changed, 0 insertions, 0 deletions