diff options
| author | Curtis Malainey <[email protected]> | 2019-11-05 17:13:35 -0800 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2019-11-11 13:02:06 +0000 |
| commit | ba0b3a977ecf525231d36f2d9f3a6ea05c35090a (patch) | |
| tree | 341e7425717c32d3e09685b9a54b07732efbb925 /lib/string_helpers.c | |
| parent | 55229597a94531726878229ccfcd3fe4ec572dc3 (diff) | |
ASoC: rt5677: Set ADC clock to use PLL and enable ASRC
Use the PLL to kept the correct 24M clock rate so frequency shift does
not occur when using the DSP VAD.
Signed-off-by: Curtis Malainey <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'lib/string_helpers.c')
0 files changed, 0 insertions, 0 deletions