MIPS: Alchemy: Fix cpu clock calculation

The current code uses bits 0-6 of the sys_cpupll register to calculate
core clock speed.  However this is only valid on Au1300, on all earlier
models the hardware only uses bits 0-5 to generate core clock.

This fixes clock calculation on the MTX1 (Au1500), where bit 6 of cpupll
is set as well, which ultimately lead the code to calculate a bogus cpu
core clock and also uart base clock down the line.

Signed-off-by: Manuel Lauss <[email protected]>
Reported-by: John Crispin <[email protected]>
Tested-by: Bruno Randolf <[email protected]>
Cc: [email protected]	[v3.17+]
Cc: Linux-MIPS <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/9279/
Signed-off-by: Ralf Baechle <[email protected]>

0 files changed, 0 insertions, 0 deletions