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authorAndy Chiu <[email protected]>2022-04-05 17:19:28 +0800
committerDavid S. Miller <[email protected]>2022-04-06 13:54:51 +0100
commitdc48f04fd6562de6019e9fc7ed9ed539d632babb (patch)
treedea8cfe08cb3227353a019b591f24ab4009f00e0 /lib/mpi/mpiutil.c
parentab3a5d4c6081dbcfd90d19cc9849af89c6985d0f (diff)
dt-bindings: net: add pcs-handle attribute
Document the new pcs-handle attribute to support connecting to an external PHY. For Xilinx's AXI Ethernet, this is used when the core operates in SGMII or 1000Base-X modes and links through the internal PCS/PMA PHY. Signed-off-by: Andy Chiu <[email protected]> Reviewed-by: Greentime Hu <[email protected]> Reviewed-by: Rob Herring <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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