diff options
| author | Ajish Koshy <[email protected]> | 2022-04-11 12:16:02 +0530 |
|---|---|---|
| committer | Martin K. Petersen <[email protected]> | 2022-04-11 21:59:49 -0400 |
| commit | 294080eacf92a0781e6d43663448a55001ec8c64 (patch) | |
| tree | d92ea2682764f4c86a1593e9134651eb55e16892 /lib/mpi/mpiutil.c | |
| parent | f19fe8f354a6e7c2b9588f83af4876e34f0ce83e (diff) | |
scsi: pm80xx: Mask and unmask upper interrupt vectors 32-63
When upper inbound and outbound queues 32-63 are enabled, we see upper
vectors 32-63 in interrupt service routine. We need corresponding registers
to handle masking and unmasking of these upper interrupts.
To achieve this, we use registers MSGU_ODMR_U(0x34) to mask and
MSGU_ODMR_CLR_U(0x3C) to unmask the interrupts. In these registers bit 0-31
represents interrupt vectors 32-63.
Link: https://lore.kernel.org/r/[email protected]
Fixes: 05c6c029a44d ("scsi: pm80xx: Increase number of supported queues")
Reviewed-by: John Garry <[email protected]>
Acked-by: Jack Wang <[email protected]>
Signed-off-by: Ajish Koshy <[email protected]>
Signed-off-by: Viswas G <[email protected]>
Signed-off-by: Martin K. Petersen <[email protected]>
Diffstat (limited to 'lib/mpi/mpiutil.c')
0 files changed, 0 insertions, 0 deletions