PCI: imx6: Initialize PHY before deasserting core reset

When the PHY is the reference clock provider then it must be initialized
and powered on before the reset on the client is deasserted, otherwise
the link will never come up. The order was changed in cf236e0c0d59.
Restore the correct order to make the driver work again on boards where
the PHY provides the reference clock. This also changes the order for
boards where the Soc is the PHY reference clock divider, but this
shouldn't do any harm.

Link: https://lore.kernel.org/r/[email protected]
Fixes: cf236e0c0d59 ("PCI: imx6: Do not hide PHY driver callbacks and refine the error handling")
Tested-by: Richard Zhu <[email protected]>
Signed-off-by: Sascha Hauer <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>

0 files changed, 0 insertions, 0 deletions