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authorJakob Unterwurzacher <[email protected]>2022-10-19 16:27:27 +0200
committerHeiko Stuebner <[email protected]>2022-10-20 11:48:15 +0200
commit91e8b74fe6381e083f8aa55217bb0562785ab398 (patch)
treece62be74c28847c438497d3fc33f65dc329f6796 /lib/mpi/mpi-mod.c
parent849c19d14940b87332d5d59c7fc581d73f2099fd (diff)
arm64: dts: rockchip: lower rk3399-puma-haikou SD controller clock frequency
CRC errors (code -84 EILSEQ) have been observed for some SanDisk Ultra A1 cards when running at 50MHz. Waveform analysis suggest that the level shifters that are used on the RK3399-Q7 module for voltage translation between 3.0 and 3.3V don't handle clock rates at or above 48MHz properly. Back off to 40MHz for some safety margin. Cc: [email protected] Fixes: 60fd9f72ce8a ("arm64: dts: rockchip: add Haikou baseboard with RK3399-Q7 SoM") Signed-off-by: Jakob Unterwurzacher <[email protected]> Signed-off-by: Quentin Schulz <[email protected]> Link: https://lore.kernel.org/r/20221019-upstream-puma-sd-40mhz-v1-0-754a76421518@theobroma-systems.com Signed-off-by: Heiko Stuebner <[email protected]>
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