diff options
| author | Sean Christopherson <[email protected]> | 2022-07-27 23:34:24 +0000 |
|---|---|---|
| committer | Paolo Bonzini <[email protected]> | 2022-08-10 15:08:30 -0400 |
| commit | 6348aafa8d24c156124f76b5a1507079c3213112 (patch) | |
| tree | a917665371c90aaacd68fa3622398c5d7456d8ea /lib/mpi/mpi-cmp.c | |
| parent | 7de8e5b6b139a3a94aca24e8d8d35b77dc33e0ac (diff) | |
KVM: VMX: Adjust number of LBR records for PERF_CAPABILITIES at refresh
Now that the PMU is refreshed when MSR_IA32_PERF_CAPABILITIES is written
by host userspace, zero out the number of LBR records for a vCPU during
PMU refresh if PMU_CAP_LBR_FMT is not set in PERF_CAPABILITIES instead of
handling the check at run-time.
guest_cpuid_has() is expensive due to the linear search of guest CPUID
entries, intel_pmu_lbr_is_enabled() is checked on every VM-Enter, _and_
simply enumerating the same "Model" as the host causes KVM to set the
number of LBR records to a non-zero value.
Signed-off-by: Sean Christopherson <[email protected]>
Message-Id: <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>
Diffstat (limited to 'lib/mpi/mpi-cmp.c')
0 files changed, 0 insertions, 0 deletions