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| author | Paul Burton <[email protected]> | 2017-06-02 15:38:01 -0700 |
|---|---|---|
| committer | Ralf Baechle <[email protected]> | 2017-06-29 02:42:29 +0200 |
| commit | e7bc8557428f069eaa613b3676ea6931c0f7fe43 (patch) | |
| tree | c7f4f7a8b42f6c974159eef349eb041b5ea7b570 /lib/mpi/mpi-bit.c | |
| parent | fa7a3b4a7217b40bf58c4f38e5ee573b43a8aa2f (diff) | |
MIPS: Add CPU shared FTLB feature detection
Some systems share FTLB RAMs or entries between sibling CPUs (ie.
hardware threads, or VP(E)s, within a core). These properties require
kernel handling in various places. As a start this patch introduces
cpu_has_shared_ftlb_ram & cpu_has_shared_ftlb_entries feature macros
which we set appropriately for I6400 & I6500 CPUs. Further patches will
make use of these macros as appropriate.
Signed-off-by: Paul Burton <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/16202/
Signed-off-by: Ralf Baechle <[email protected]>
Diffstat (limited to 'lib/mpi/mpi-bit.c')
0 files changed, 0 insertions, 0 deletions