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| author | Biju Das <[email protected]> | 2022-09-20 11:54:59 +0100 |
|---|---|---|
| committer | Laurent Pinchart <[email protected]> | 2022-11-09 16:45:34 +0200 |
| commit | b1a90f510230afa9483e38fccbf9e4274c92aa8c (patch) | |
| tree | 117ed63e7954f4d3268d217bb8fa2e5b14abe14f /lib/memory-notifier-error-inject.c | |
| parent | 1760eb547276299ab0c6a6cd3d29469e54ade615 (diff) | |
dt-bindings: display: bridge: Document RZ/G2L MIPI DSI TX bindings
The RZ/G2L MIPI DSI TX is embedded in the Renesas RZ/G2L family SoC's. It
can operate in DSI mode, with up to four data lanes.
Signed-off-by: Biju Das <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Reviewed-by: Laurent Pinchart <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Laurent Pinchart <[email protected]>
Diffstat (limited to 'lib/memory-notifier-error-inject.c')
0 files changed, 0 insertions, 0 deletions