pstore-ram: Fix hangs by using write-combine mappings

Currently trying to use pstore on at least ARMs can hang as we're
mapping the peristent RAM with pgprot_noncached().

On ARMs, pgprot_noncached() will actually make the memory strongly
ordered, and as the atomic operations pstore uses are implementation
defined for strongly ordered memory, they may not work. So basically
atomic operations have undefined behavior on ARM for device or strongly
ordered memory types.

Let's fix the issue by using write-combine variants for mappings. This
corresponds to normal, non-cacheable memory on ARM. For many other
architectures, this change does not change the mapping type as by
default we have:

#define pgprot_writecombine pgprot_noncached

The reason why pgprot_noncached() was originaly used for pstore
is because Colin Cross <[email protected]> had observed lost
debug prints right before a device hanging write operation on some
systems. For the platforms supporting pgprot_noncached(), we can
add a an optional configuration option to support that. But let's
get pstore working first before adding new features.

Cc: Arnd Bergmann <[email protected]>
Cc: Anton Vorontsov <[email protected]>
Cc: Colin Cross <[email protected]>
Cc: Olof Johansson <[email protected]>
Cc: [email protected]
Cc: [email protected]
Acked-by: Kees Cook <[email protected]>
Signed-off-by: Rob Herring <[email protected]>
[[email protected]: updated description]
Signed-off-by: Tony Lindgren <[email protected]>
Signed-off-by: Tony Luck <[email protected]>

0 files changed, 0 insertions, 0 deletions