IRQCHIP: mips-gic: Avoid rerouting timer IRQs for smp-cmp

Commit e9de688dac65 ("irqchip: mips-gic: Support local interrupts")
changed the GIC irqchip driver so that all local interrupts were routed
to the same CPU pin used for external interrupts. Unfortunately this
causes a regression when smp-cmp is used. The CPUs are started by the
bootloader and put in a timer based waiting poll loop, but when their
timer interrupts are rerouted to a different IRQ pin which is not
unmasked they never wake up.

Since smp-cmp support is deprecated and everybody who was using it
should be switching to smp-cps which brings up the secondary CPUs
without bootloader assistance, I've gone for the simple fix which can be
easily removed once smp-cmp is removed, rather than a fully generic fix.

In __gic_init() the local GIC_VPE_TIMER_MAP register is read to find the
boot-time routing of the local timer interrupt, and a chained handler is
added to that CPU pin as well as the normal one.

Signed-off-by: James Hogan <[email protected]>
Fixes: e9de688dac65 ("irqchip: mips-gic: Support local interrupts")
Cc: Andrew Bresticker <[email protected]>
Cc: Qais Yousef <[email protected]>
Cc: Paul Burton <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: [email protected]
Reviewed-by: Andrew Bresticker <[email protected]>
Patchwork: https://patchwork.linux-mips.org/patch/9081/
Signed-off-by: Ralf Baechle <[email protected]>

0 files changed, 0 insertions, 0 deletions